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MIE346: Analog and Digital Electronics
For Mechatronics Engineers
Design Assignment IV
“TESTING AND REVISION”
April 07, 2025
Fig.0: Power Supply Design
We tested our PCB using the equipment shown in Fig. 1.1 a,b, and believe that our PCB and the overall created power supply worked correctly. There were a few inconsistencies with the the unfiltered and filtered outputs, however, they were small, and we considered it safe to move forward. A problem we faced, likely due to a defective board, was that we had to set our current limit a little higher than was instructed in order for our LCD display to turn on. We understand this was unsafe, but due to the lack of time and availability of a new, tested board, we proceeded with caution. We were also having trouble holding the pins when soldering; we flipped the board so many times, we accidentally, although initially identified correctly, solder the pin insert on the wrong side of the board. Although we desoldered and resoldered correctly, some of our testing was done with the help of external connections using jumper wires - which seemed to work just as fine.
Fig. 1.1: Initial soldering for DA4
Fig. 1.2: Testing our solder by seeing if the LCD turned on
Fig. 1.3: Equipment used during testing stage
Table 1.0: Measurements obtained from our PCB board by changing the current limit in steps.
Note that we stopped at 2.500 A, which was already too far, to avoid our board from being fried. As mentioned previously, we were working at a higher current limit than what was suitably considered “safe” to test our power supply design.
The point at 2.000 A created an unnecessary spike in the trendline, likely caused by the excess temperature the board reached at such a current, and therefore it was removed in our scatter plots shown in Figures 2.1 and 2.2 below.
Figure 2.1: Plot of I_SENSE vs. ADC Value (Unfiltered) with trendline
Figure 2.2: Plot of I_SENSE vs. ADC Value (Filtered) with trendline
Figure 2.3: IDE after adjusting gradient values.
As shown in the table below, we were able to obtain measurements as be expected, with negligible variance.
Table 3.1: Measured voltage compared to expected voltage.
VOUT [V] (Target)
VOUT [V] (Measured)
5.00
4.99
7.00
6.95
9.00
8.98
11.00
11.01
15.00
14.93
Table 3.2: Measured IOUT compared to expected IOUT.
IOUT [A] (Target)
IOUT [A] (Measured)
0.50
0.54
1.00
1.02
1.25
1.26
1.50
1.49
2.00
1.86
Our set current limit was likely too high, as a result, we can see that near the 2.00 A mark, the measured IOUT value started to fade.
Figure 3.3.1: Power Supply connected to IDE.
Figure 3.3.2: Back side of the project with PCB mounted
A.1 a,b: Soldered reference PCB (front and back)
Special thanks to Ramanjeet Hansra